TMC22071A 查看數據表（PDF） - Fairchild Semiconductor
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TMC22071A Datasheet PDF : 24 Pages
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PRODUCT SPECIFICATION
TMC22071A
CVBS Bus Data Formats
The CVBS bus outputs a Genlock Reference Signal (GRS)
along with the 8-bit digital composite video data. The range
of output data versus video input voltage is illustrated in
Figure 7 where sync tip and blanking levels are controlled by
the digital backporch clamp of the TMC22071A. During
horizontal sync, the TMC22071A outputs field identifica-
tion, subcarrier frequency, and subcarrier phase information
on the CVBS bus.
Peak Chrominance
NTSC PAL
FEh FFh
Peak Luminance
D2h CFh
Back Porch
Burst
Blanking
3Ch 40h
Sync Tip
03h 03h
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Figure 7. Output Data vs. Input Video Level
Field identification is output on CVBS2-0. The LSB,
CVBS0, will be LOW during odd fields and HIGH for even
fields. When NTSC operation is selected, CVBS1-0 count
00,01,10,11 for fields 1 through 4 respectively. When PAL
operation is selected, CVBS2-0 count 000, 001, 010, etc. to
111 for fields 1 through 8, respectively.
CVBS3 indicates V-component inversion in PAL. It is HIGH
for NTSC lines (burst 135°) and LOW for PAL lines (burst
225°)
Subcarrier frequency is sent out in a 24-bit binary represen-
tation in six 4-bit nibbles on CVBS3-0. Subcarrier frequency
data, f23-0, is identical to the pre-programmed BSEED value
used in the TMC22071A to lock the subcarrier phase-locked
loop to the incoming subcarrier frequency.
Subcarrier phase, F23-0, is also sent out in a 24-bit binary
representation in six 4-bit nibbles on CVBS3-0. Bit F23 is
the MSB.
PXCK
01 2 3
GHSYNC
57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76
CVBS7:0 PIXEL PIXEL
PIXEL
f23:20 f19:16 f15:12 f11:8 f7:4 f3:0 f23:20 f19:16 f15:12 f11:8 f7:4 f3:0
FREQUENCY
FIELD IDENTIFICATION
PHASE
Figure 8. Genlock Reference Signal (GRS) Format
PIXEL PIXEL
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PXCK
GHSYNC
LDV
tHO
CVBS7:0
tPWHPX tPWHPX
1/fPXCK
tDO
tXL
tXV
PIXEL 0
Figure 9. CVBS Bus Video Data Format
PIXEL 1
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