M66281FP 查看數據表（PDF） - Renesas Electronics
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M66281FP Datasheet PDF : 16 Pages
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M66281FP
Matters that Needs Attention when WCK Stops
WCK
n cycle n + 1 cycle
tWCK
WEB
tDS tDH
Dn
(n)
n cycle
Disable cycle
tNWES
tDS tDH
(n)
Period for writing data (n)
into memory
Period for writing data (n)
into memory
WRESB = "H"
Input data of n cycle is read at the rising edge after WCK of n cycle and writing operation starts in the WCK low-level
period of n + 1 cycle. The writing operation is complete at the falling edge after n + 1 cycle.
To stop reading write data at n cycle, enter WCK before the rising edge after n + 1 cycle.
When the cycle next to n cycle is a disable cycle, WCK for a cycle requires to be entered after the disable cycle as well.
REJ03F0254-0200 Rev.2.00 Sep 14, 2007
Page 8 of 15
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