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MC74HC589A

8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output

ON Semiconductor 

MC74HC589A

FUNCTION TABLE

Inputs

Operation

Output Serial Shift/ Latch

Enable Parallel Load Clock

Force Output into High

H

X

X

Impedance State

Load Parallel Data into Data L

H

Latch

Transfer Latch Contents to

L

Shift Register

L

L, H,

Contents of Input Latch and

L

Shift Register are Unchanged

H

L, H,

Load Parallel Data into Data L

L

Latch and Shift Register

Shift Serial Data into Shift

L

H

X

Register

Load Parallel Data in Data

L

H

Latch and Shift Serial Data

into Shift Register

LR =

SR =

a−h =

D=

latch register contents

shift register contents

data at parallel data inputs A−H

data (L, H) at serial data input SA

Shift

Clock

X

L, H,

X

L, H,

X

Serial

Input

SA

X

Parallel

Inputs

A−H

X

Resulting Function

Data

Latch

Contents

Shift

Register

Contents

Output

QH

X

X

Z

X

a−h

a−h

U

U

X

X

X

X

U

LRN → SRN

LRH

U

U

U

X

a−h

a−h

a−h

h

D

X

D

a−h

*

SRA = D, SRG → SRH

SRN → SRN+1

a−h

SRA = D, SRG → SRH

SRN → SRN+1

U = remains unchanged

X = don’t care

Z = high impedance

* = depends on Latch Clock input

SWITCHING WAVEFORMS

tr

tf

LATCH

CLOCK

90%

50%

10%

tw

tPLH

tPHL

QH

90%

50%

10%

tTLH

tTHL

VCC

GND

SHIFT

CLOCK

tw

50%

1/fmax

QH 50%

tPLH

tPHL

VCC

GND

Figure 2. (Serial Shift/Parallel Load = L)

Figure 3. (Serial Shift/Parallel Load = H)

OUTPUT

ENABLE

QH

QH

50%

tPZL tPLZ

50%

tPZH tPHZ

50%

Figure 4.

10%

90%

VCC

GND

HIGH

IMPEDANCE

VOL

VOH

HIGH

IMPEDANCE

SERIAL SHIFT/

PARALLEL LOAD

tw

50%

tPLH

QH

50%

Figure 5.

50%

tPHL

http://onsemi.com

6

VCC

GND

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