MX10C8051 查看數據表（PDF） - Macronix International
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MX10C8051 Datasheet PDF : 14 Pages
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MX10C805X
DC CHARACTERISTICS (Over Operating Conditions)
All parameter values apply to all devices unless otherwise indicated.
Symbol Parameter
Min
Typ
VIL
VIL1
VIH
VIH1
VOL
VOL1
VOH
VOH1
IIL
ILI
ITL
PRST
CIO
ICC
Input Low Voltage
Input Low Voltage EA
Input High Voltage
(Except XTAL1, RST)
Input High Voltage
(XTAL1, RST)
Output Low Voltage (Note 5)
(Ports 1, 2, and 3)
Output Low Voltage (Note 5)
(Port 0, ALE, PSEN)
Output High Voltage
(Port 1, 2 and 3, ALE, PSEN)
Output High Voltage
(Port 0 in External Bus Mode)
Logical 0 Input Current
(Ports 1, 2 and 3)
Input leakage Current (Port 0)
Logical 1 to 0 Transition Current
(Ports 1, 2 and 3)
Industrial
RST Pulldown Resistor
Pin Capacitance
Power Supply Current:
Active Mode at 40 MHz
Idle Mode at 40 MHz(70°C 5.5V)
Power Down Mode
-0.5
0
0.2 VCC+0.9
0.7 VCC
0.9 VDD
0.75 VDD
0.5 VDD
0.9 VDD
0.75 VDD
0.5 VDD
15
10
2
Max
Unit
(Note 4)
0.2 VCC-0.1 V
0.2 VCC-0.3 V
VCC+0.5
V
Test Conditions
VCC+0.5
V
0.4
0.4
-50
±10
-750
V
IOL=1.6 mA (Note 1)
V
IOL=3.2 mA (Note 1)
V
IOH=-10 uA
V
IOH=-30 uA
V
IOH=-60uA
V
IOH=-80 uA
V
IOH=-300 uA
V
IOH=-800 uA
uA VIN=0.4V
uA
VIN=VIL or VIH
uA VIN=2V
150
K ohm
pF
@1 MHz, 25°C
(Note 3)
60
mA
28
mA
10
uA
NOTES:
1. Capacitive loading on Ports 0 and 2 may cause noise pulses above 0.4V to be superimposed on the VOLs of ALE and Ports 1, 2 and 3. The
noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins change from 1 to 0. In applications
where capacitive loading exceeds 100 pF, the noise pulses on these signlas may exceed 0.8V. It may be desirable to qualify ALE or other
signals with a Schmitt Triggers, or CMOS-level input logic.
2. Capacitive loading on Ports 0 and 2 cause the VOH on ALE and PSEN to drop below the 0.9 VCC specification when the address lines are
stabilizing.
3. Minimum VCC for Power Down is 2V.
4. Typicals are based on a limited number of samples and are not guaranteed. The values listed are room temperature and 5V.
5. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin:
10mA
Maximum IOL per 8-bit port:
Port 0:
26mA
Ports 1, 2 and 3: 15mA
Maximum total IOL for all output pins:
71mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test
conditions.
P/N:PM0591
REV. 0.3, APR. 09, 1999
6
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