MX10F201FC 查看數據表（PDF） - Macronix International

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MX10F201FC

High-Performance and Low Power Microcontroller designed for Use Many Applications

Macronix International 

MX10F201FC

FUNCTIONAL DESCTIPTION

General

The MX10F201FC is a stand-alone high-performance and low power microcontroller designed for use in many

applications which need code programmability.

The Flash EPROM offers customers to program the device themselves. This feature increases the flexibility in

many applications, not only in development stage, but also in mass production stage.

In addition to the 80C51 standard functions, the MX10F201FC provides a number of dedicated hardware functions.

MX10F201FC is a control-oriented CPU with on-chip program and data memory. It can execute program with internal

memory up to 16k bytes. MX10F201FC has four software selectable modes of reduced activity for power reduction :

active power control, idle, sleep, and Power-down. The idle mode freezes the CPU while allowing the RAM, Timers,

serial ports, interrupt system and other peripherals to continue functioning. The Power-down mode saves the RAM

contents but freezes the oscillator causing all other chip functions to be inoperative. Power-down mode can be

terminated by an external reset ,and in addition , by either of the four external interrupts. The sleep mode behaves like

power down mode, but with LCD and oscillator still turning on. And sleep mode can be terminated as the power down

mode does.

Instruction Set Execution

The MX10F201FC uses the powerful instruction set of the 80C51. Additional SFRs are incorporated to control the

on-chip peripherals. The instruction set consists of 49 single-byte, 46 two-bytes, and 16 three-bytes instructions.

When using a 16MHz oscillator, 64 instructions execute in 750 ns and 45 instructions execute in 1.5 us. Multiply and

divide instructions execute in 3 us.

MEMORY ORGANIZATION

The Central Processing Unit (CPU) manipulates operands in three memory spaces; these are the 256 bytes

internal data memory (RAM), 256 byte auxiliary data memory (AUX-RAM) and 16k byte internal MTP program memory

(FEPROM).

Program Memory

The program memory address space of the MX10F201FC comprises an internal and an external memory space.

The MX10F201FC has 16k byte of program memory on-chip.

Program Protection

If the user choose to set security lock in MTP memory, the program content is protected from reading out of chip.

Internal Data Memory

The internal data memory is divided into three physically separated parts: 256 byte of RAM, 256 bytes of AUX-

RAM, and 128 bytes special function register area (SFR). These parts can be addressed as follows (see Fig.4 and

Table. 2)

- RAM 0 to 127 can be addressed directly and indirectly as in the 80C51. Address pointers are R0 and R1 of

the selected register bank.

- RAM 128 to 255 can only be addressed indirectly . Address pointers are R0 and R1 of the selected register

bank.

- AUX-RAM 0 to 255 is indirectly addressable as the external data memory locations 0 to 255 with the MOVX

instructions. Address pointers are R0 and R1 of the selected register bank and DPTR. When executing from

internal program memory, an access to AUX_RAM 0 to 255 will not affect the ports P0,P2,P3.6 and P3.7.

SFRs can only be addressed directly in the address range from 128 to 255.

P/N:PM0730

REV. 0.1, FEB. 14, 2003

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