PEB2096(1999) 查看數據表（PDF） - Infineon Technologies

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PEB2096
(Rev.:1999)

ICs for Communications Octal Transceiver for UPN Interfaces OCTAT-P

Infineon Technologies 

PEB 2096

Overview

1.4

Pin Definitions and Functions

Pin No.

Symbol Input (I)

Output (O)

6, 12, 22, 28, VDD

I

34, 44

3, 9, 19,

VSS

I

25, 31, 37

33, 32

30, 29

27, 26

24, 23

1, 2

4, 5

7, 8

10, 11

LI0a,b I/O

LI1a,b I/O

LI2a,b I/O

LI3a,b I/O

LI4a,b I/O

LI5a,b I/O

LI6a,b I/O

LI7a,b I/O

43

FSC I

42

DCL I

41

DD

I

40

DU

O

39

IDS

I

16

TMS I

15

TCK I

14

TDI

I

13

TDO O

20

XTAL1 I

21

XTAL2 O

36

CLK1 O

35

CLK2 O

38

RST I

Function

+ 5 V power supply

Reference ground

UPN Line Interfaces a,b

No. 0: differential input / output

No. 1: differential input / output

No. 2: differential input / output

No. 3: differential input / output

No. 4: differential input / output

No. 5: differential input / output

No. 6: differential input / output

No. 7: differential input / output

IOM®-2 Interface

Frame Synchronization Clock: 8 kHz

Data Clock

Data Downstream (data input)

Data Upstream (data output)

Interface Data rate Select (static pin-strapped):

0: double DCL (normal IOM interface)

1: single DCL

JTAG Boundary Scan Interface

Test Mode Select, internal pull-up resistor

Test Clock

Test Data Input, internal pull-up resistor

Test Data Output

Oscillator or 15.36 MHz clock input

Oscillator output

Clock output 15.36 MHz

(i.e. to drive other OCTAT-P)

Clock output 7.68 MHz

(i.e. to drive ISAC-S or QUAT-S)

Reset, active high

Data Sheet

1-6

04.99

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