V62C3802048L-100B 查看數據表（PDF） - Mosel Vitelic Corporation

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V62C3802048L-100B

Ultra Low Power 256K x 8 CMOS SRAM

Mosel Vitelic Corporation  

V62C3802048L(L)

Read Cycle (3,9) (Vcc = 2.7 to3.3V, Gnd = 0V, TA = 00C to +700C / -400C to +850C)

Parameter

Symbol -35

-45

Unit Note

Read Cycle Time

Address Access Time

Chip Enable Access Time

Output Enable Access Time

Output Hold from Address Change

Chip Enable to Output in Low-Z

Chip Disable to Output in High-Z

Output Enable to Output in Low-Z

Output Disable to Output in High-Z

Power-Up Time

Power-Down Time

Min Max Min Max

tRC

35 - 45 -

ns

tAA

- 35 - 45 ns

tACE

- 35 - 45 ns

tOE

- 20 - 20 ns

tOH

5-5-

ns

tCLZ

5-5-

ns

4,5

tCHZ

- 20 - 25

ns

4,5

tOLZ

5-5-

ns

4,5

tOHZ

- 15 - 20

ns

4,5

tPU

0-0-

ns

5

tPD

- 35 - 45 ns

5

Write Cycle (3,11) (Vcc = 2.7 to 3.3V, Gnd = 0V, TA = 00C to +700C / -400C to +850C)

Parameter

Write Cycle Time

Chip Enable to Write End

Address Setup to Write End

Address Setup Time

Write Pulse Width

Write Recovering Time

Data Valid to Write End

Data Hold Time

Write Enable to Output in High-Z

Output Active from Write End

Symbol -35

-45

Unit

Min Max Min Max

tWC

35 - 45 -

ns

tCW

30 - 40 -

ns

tAW

30 - 40 -

ns

tAS

0-0-

ns

tWP

30 - 35 -

ns

tWR

0-0-

ns

tDW

20 - 25 -

ns

tDH

0-0-

ns

tWZ

- 20 - 25 ns

tOW

5-5-

ns

Note

4,5

4,5

7

REV. 1.2 May 2001 V62C3802048L(L)

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