W83194R-58A 查看數據表（PDF） - Winbond

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W83194R-58A

100MHZ AGP CLOCK FOR VIA CHIPSET

Winbond 

W83194R-58A

PRELIMINARY

8.3 SERIAL CONTROL REGISTERS

The Pin column lists the affected pin number and the @PowerUp column gives the state at true

power up. Registers are set to the values shown only on true power up. "Command Code" byte and

"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data

(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.

After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and

acknowledged.

8.3.1 Register 0: CPU Frequency Select Register

Bit @PowerUp

7

0

6

0

5

0

4

0

3

0

2

0

1

0

0

0

Pin

Description

-

0 = ±0.25% Spread Spectrum Modulation

1 = ±0.5% Spread Spectrum Modulation(W83194R-58)

-

SSEL2 ( Frequency table selection by software via I2C)

-

SSEL1 ( Frequency table selection by software via I2C)

-

SSEL0 ( Frequency table selection by software via I2C)

-

0 = Selection by hardware

1 = Selection by software I2C - Bit 6:4

-

SSEL3 (Frequency table selection by software via I2C for

W83194R-58)

-

0 = Normal

1 = Spread Spectrum enabled

-

0 = Running

1 = Tristate all outputs

Publication Release Date: Nov. 1999

-7-

Revision 0.30

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