V53C16126H 查看數據表（PDF） - Mosel Vitelic Corporation
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V53C16126H Datasheet PDF : 18 Pages
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MOSEL VITELIC
V53C16126H
HIGH PERFORMANCE
128K X 16 BIT FAST PAGE MODE
CMOS DYNAMIC RAM
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Fast Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
30
30 ns
16 ns
19 ns
65 ns
35
35 ns
18 ns
21 ns
70 ns
40
40 ns
20 ns
23 ns
75 ns
45
45 ns
22 ns
25 ns
80 ns
50
50 ns
24 ns
28 ns
90 ns
Features
s 128K x 16-bit organization
s Fast Page Mode for a sustained data rate
of 53 MHz
s RAS access time: 30, 35, 40, 45, 50ns
s Dual CAS Inputs
s Low Power Dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
s Refresh Interval: 512 cycles/8 ms
s Available in 40-pin 400 mil SOJ and 40/44L-pin
400 mil TSOP-II packages
s Single +5V±10% Power Supply
s TTL Interface
Description
The V53C16126H is a 131,072 x 16 bit high
performance CMOS dynamic random access
memory. The V53C16126H offers Fast Page mode
with dual CAS inputs. The V53C16126H has
asymmetric address, 9-bit row and 8-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 256 x 16
bits, within a page, with cycle times as short as
19ns.
The V53C16126H is ideally suited for a wide
variety of high performance computer systems and
peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
Package Outline
Access Time (ns)
K
T
30 35 40 45 50
•
•
•
•
•
•
•
Power
Std.
•
Temperature
Mark
Blank
V53C16126H Rev. 1.3 February 1998
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