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HD74LS93FPEL 查看數據表(PDF) - Renesas Electronics

零件编号
产品描述 (功能)
比赛名单
HD74LS93FPEL
Renesas
Renesas Electronics Renesas
HD74LS93FPEL Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HD74LS93
4-bit Binary Counter
REJ03D0423–0200
Rev.2.00
Feb.18.2005
The HD74LS93 contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and
three-state binary counter for divide-by-eight. To use this maximum count length of this counter, the B input is
connected to the QA output. The input count pulses are applied to input A and the outputs are described in the
appropriate function table.
Features
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS93P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
PRSP0014DF-B
HD74LS93FPEL SOP-14 pin (JEITA)
(FP-14DAV)
FP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Pin Arrangement
B1
R0(1) 2
R0(2) 3
NC 4
VCC 5
NC 6
NC 7
B
R0(1)
R0(2)
A
QA
QD
QB
QC
14 A
13 NC
12 QA
11 QD
10 GND
9 QB
8 QC
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 8

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