HI1172 查看數據表（PDF） - Intersil
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HI1172 Datasheet PDF : 7 Pages
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HI1172
Absolute Maximum Ratings TA = 25oC
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Reference Voltage (VRT, VRB) . . . . . . . . . . . . . . . . . . . . VDD to VSS
Analog Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Digital Input Voltage (CLK) . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Digital Output Voltage (VOH, VOL) . . . . . . . . . . . . . . . . . VDD to VSS
Operating Conditions
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Supply Voltage Range, AVDD, AVSS . . . . . . . . . . . . 4.75V to 5.25V
Reference Voltage, DVDD, DVSS
VRT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9V to 5V
VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 4.1V
VRT - VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.9V to AVDD
Analog Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . VRB to VRT
Clock Pulse Width
tPW1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
tPW0 . . . .
Temperature
......
Range
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. . 25ns
-20oC to
(Min)
75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications VDD = +5V, VRB = 1V, VRT = 2V, TA = 25oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNITS
Conversion Speed, fC
Integral Non-Linearity
Differential Non-Linearity
Supply Current
fC
VIN = 1V to 2V
fIN = 1kHz Ramp
EL
fC = 20 MSPS
VIN = 1V to 2V
ED
fC = 20 MSPS
VIN = 1V to 2V
IDD
fC = 20 MSPS
NTSC Ramp Wave Input
0.5
-
20
MSPS
-
±0.3
±0.5
LSB
-
±0.3
±0.5
LSB
-
7
12
mA
Reference Pin Current
Analog Input (-1dB)
IREF
BW
3
4
5.7
mA
-
18
-
MHz
Analog Input Capacitance
Reference Resistance (VRT to VRB)
Offset Voltage
Digital Input Voltage
Digital Input Current
Digital Output Current
Output Data Delay
Differential Gain Error
CIN
VIN = 1.5V + 0.07VRMS
-
4
-
pF
RREF
175
250
325
Ω
EOT
0
-20
-40
mV
EOB
15
35
55
mV
VIH
4.0
-
-
V
VIL
-
-
1.0
V
IIH
VDD = Max
VIH = VDD
-
-
5
µA
IIL
VIL = 0V
-
-
5
µA
IOH
VDD = Min
VOH = VDD = 0.5V
-1.1
-
-
mA
IOL
VOL = 0.4V
3.7
-
-
mA
TDL
With TTL 1 Gate and 10pF Load
-
18
30
ns
DG
NTSC 40 IRE Mod
-
1.0
-
%
Differential Phase Error
Aperture Jitter
Sampling Delay
DP
Ramp, fC = 14.3 MSPS
tAJ
tSD
-
1.0
-
deg
-
40
-
ps
-
4
-
ns
4-1065
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