MC68160AEB 查看數據表（PDF） - Integrated Device Technology
零件编号
产品描述 (功能)
比赛名单
MC68160AEB Datasheet PDF : 30 Pages
| |||
MC68160A
Enhanced Ethernet Transceiver
NETCOM
MC68160A
Table 1. Pin Function Description (continued)
Pin(s)
Symbol
Type
Name/Function
STATUS INDICATOR
40
TXLED
41
RXLED
42
CLLED
43
TPLIL
44
TPPLR
45
TPJABB
O
TTL/CMOS
O
TTL/CMOS
O
TTL/CMOS
O
TTL/CMOS
O
TTL/CMOS
O
TTL/CMOS
Transmit Status LED Driver Output: This pin indicates the transmit status of the currently
selected TP or AUI port. When there is no transmit activity detected, an internal pull - up takes
this pin to its normal off (high) state. When transmit activity is detected, the LED driver turns
on. In its on state, TXLED flashes the LED by driving low at approximately 10 Hz at a 50%
duty cycle. In the standby mode, this output is driven to the high impedance state.
Receive Status LED Driver Output: This pin indicates the receive status of the currently
selected TP or AUI port. When there is no receive activity detected, an internal pull - up takes
this pin to its normal off (high) state. When receive activity is detected, the LED driver turns
on. In its on state, RXLED flashes the LED by driving low at approximately 10 Hz at a 50%
duty cycle. In the standby mode, this output is driven to the high impedance state.
Collision Status LED Driver Output: This pin indicates the collision status of the currently
selected TP or AUI port. When there is no collision activity detected, an internal pull - up takes
this pin to its normal off (high) state. When collision activity is detected, the LED driver turns
on. In its on state, CLLED flashes the LED by driving low at approximately 10 Hz at a 50%
duty cycle. In the standby mode, this output is driven to the high impedance state.
Twisted Pair Link Integrity Output: This output is driven to the low output state to indicate
good link integrity on the TP port during TP mode. It is deasserted (high) when link integrity
fails in TP mode. The TPLIL output is driven to the high impedance state when the AUI port
is selected. In the standby mode, this output is also driven to the high impedance state.
Twisted Pair Polarity Error Output: If TPAPCE is high and the wires connected to the
Twisted Pair Receiver Inputs (TPRX+, TPRX - ) are reversed, TPPLR will be driven to the low
logic state to indicate the fault. TPPLR remains low when the MC68160A, AB and AC has
automatically corrected for the reversed wires. If the twisted pair link integrity tests fail, this
output will be driven to the high logic state. When the AUI mode is selected this output is
driven to the high impedance state. In the standby mode, this output is also driven to the high
impedance state.
Twisted Pair Jabber Output: This pin is driven high to indicate a jabber condition at the
TPTX+/- outputs. (Jabber condition also causes CLLED to be driven alternately to the high
and low output levels). TPJABB is driven to the low output state when no jabber condition is
present. When the AUI mode is selected this output is driven to the high impedance state. In
the standby mode, this output is also driven to the high impedance state.
POWER SUPPLY AND GROUND
10
VDDDIV
Frequency Divider Supply Pin
11
VDDFM
13
GNDFM
Frequency Multiplier Supply and Ground Pins
14
GNDVCO
15
VDDVCO
Voltage Controlled Oscillator Ground and Supply Pins
20
GNDSUB
Substrate Ground Pin
7
VDDDIG
8
GNDDIG
18
VDDDIG
19
GNDDIG
Digital Supply and Ground Pins
30
VDDANA
33
GNDANA
Analog Supply and Ground Pins
34
GNDPWR
35
VDDPWR
38
VDDPWR
39
GNDPWR
Power Supply and Ground Pins
47
GNDCTL
Controller Interface Ground Pin
NOTE: Power and ground pins are not connected internally. Failure to connect externally may cause malfunction or damage to the IC.
IDT™ Enhanced Ethernet Transceiver
MC68160A
Freescale T6iming Solutions Organization has been acquired by Integrated Device TechnologyM, IOncTOROLA ANALOG IC DEVICE DATA
6
Share Link: 