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LIS3L02AS 查看數據表(PDF) - STMicroelectronics

零件编号
产品描述 (功能)
比赛名单
LIS3L02AS Datasheet PDF : 7 Pages
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LIS3L02AS
Figure 1. Equivalent electrical circuit
Cps1
Rs1
S1x
Cs1x
Cpr
Rr
Cps2
Cps1
Cs2x
Rs2
Rs1
S2x
S1y
Cs1y
Cpr
Rr
rot
Cs2y
Cps2
S2y
Rs2
Cps1
Cpr
Rs1
Cs1z
Rr
S1z
Cs2z
Cps2
S2z
Rs2
1.2 IC Interface
The complete signal processing uses a fully differential structure, while the final stage converts the differ-
ential signal into a single-ended one to be compatible with the external world.
The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at
its output to cancel the offset and the 1/f noise. The produced signal is then sent to three different S&Hs,
one for each channel, and made available to the outside.
The low noise input amplifier operates at 200 kHz while the three S&Hs operate at a sampling frequency
of 66 kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accu-
rate output waveform.
All the analog parameters (output offset voltage and sensitivity) are ratiometric to the voltage supply. In-
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