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FX641(1997) 查看數據表(PDF) - CML Microsystems Plc

零件编号
产品描述 (功能)
比赛名单
FX641
(Rev.:1997)
CML
CML Microsystems Plc CML
FX641 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Application Information ......
Fixed Sensitivity Setting
In this mode the sensitivity of each channel is set
by the correct selection of the components around the
Channel Input Amplifier.
Note that the device sensitivity is directly proportional
to the applied power supply (VDD).
Input Gain Calculation
The input amplifier, with its external circuitry, is
available to set the sensitivity of the FX641 to conform
to the user's national level specification with regard to
‘Must’ and ‘Must-Not’ decode signal levels.
With reference to the graph in Figure 8, the
following steps will assist in the determination of the
required gain/attenuation.
Step 1
Draw two horizontal lines from the Y-axis (Signal
Level (dB)).
The upper line will represent the required ‘Must’
decode level.
The lower line will represent the required ‘Must-Not’
decode level.
Step 2
Mark the intersection of the upper horizontal line
and the upper sloping line; drop a vertical line from
this point to the X-axis (Amplifier Gain (dB)).
The point where the vertical line meets the X-axis
will indicate the MINIMUM Input Amp gain required
for reliable decoding of valid signals.
Step 3
Mark the intersection of the lower horizontal line
and the lower sloping line; drop a vertical line from
this point to the X-axis.
The point where the vertical line meets the X-axis
will indicate the MAXIMUM allowable Input Amp
gain.
Input signals at or below the ‘Must-Not’ decode
level will not be detected as long as the amplifier
gain is no higher than this level.
Select the Input Gain Components as described.
Microcircuit Protection Against High Voltages
Telephone systems may have high d.c. and a.c.
voltages present on the line. If the FX641 is part of a
host equipment that has its own signal input protection
circuitry, there will be no need for further protection as
long as the voltage on any pin is limited to within V
DD
+0.3V and VSS -0.3V.
If the host system does not have input protection, or
there are signals present outside the device's specified
limits, the FX641 will require protection diodes at its
signal inputs (+ and -). The breakdown voltage of
capacitors and the peak inverse voltage of the diodes
must be sufficient to withstand the sum of the d.c.
voltages plus all expected signal peaks.
Aliasing
Due to the switched-capacitor filters employed in
the FX641, care should be taken, with the chosen
external components, to avoid the effects of alias
distortion.
Possible Alias Frequencies:
12kHz Mode = 52kHz
16kHz Mode = 69kHz
If these alias frequencies are liable to cause
problems and/or interference, it is recommended that
anti-alias capacitors are employed across input
resistors R3 and R4 or R7 and R8.
Values of anti-alias capacitors should be chosen so
as to provide a highpass cutoff frequency, in
conjunction with R3 (R4) (R7) (R8) of approximately
20kHz to 25kHz (12kHz system) or 25kHz to 30kHz
(16kHz system).
i.e. C
=1
2
x
π
x
f
0
x
R
3
When anti-alias capacitors are used, allowance
must be made for reduced gain at the SPM frequency
(12kHz or 16kHz).
Input Gain Components
With reference to the gain components shown in
Figure 2.
The user should calculate and select external
components (R /R /C , R /R /C and R /R /C , R /R /C )
133 244
575 686
to provide amplifier gains within the limits obtained in
Steps 2 and 3.
Component tolerances should not move the gain-
figure outside these limits. The graph in Figure 8 is for the
calculation of input gain components for an FX641 using
a VDD of 5.0 (±0.1) volts.
It is recommended that the designed gain is near the
centre of the calculated range.
4.9

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