V58C265804SL-7 查看數據表（PDF） - Mosel Vitelic, Corp

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V58C265804SL-7

HIGH PERFORMANCE 2.5 VOLT 8M X 8 DDR SDRAM 4 BANKS X 2Mbit X 8

Mosel Vitelic, Corp 

MOSEL VITELIC

V58C265804S

Auto Precharge Operation

The Auto Precharge operation can be issued by having column address A10 high when a Read or Write

command is issued. If A10 is low when a Read or Write command is issued, then normal Read or Write burst

operation is executed and the bank remains active at the completion of the burst sequence. When the Auto

Precharge command is activated, the active bank automatically begins to precharge at the earliest possible

moment during the Read or Write cycle once tRAS(min) is satisfied.

Read with Auto Precharge

If a Read with Auto Precharge command is initiated, the DDR SDRAM will enter the precharge operation

N-clock cycles measured from the last data of the burst read cycle where N is equal to the CAS latency pro-

grammed into the device. If a Read with autoprecharge command is issued before tRAS(min) is satisfied, the

precharge operation will be delayed until that time when tRAS(min) is met. Once the autoprecharge opera-

tion has begun, the bank cannot be reactivated until the minimum precharge time (tRP) has been satisfied.

Read with Autoprecharge Timing

T0

CK, CK

Command

DQS

DQ

(CAS Latency = 2; Burst Length = 4)

T1

T2

T3

T4

T5

T6

T7

T8

T9

tRAS(min)

tRP(min)

BA

NOP R w/AP NOP

NOP

NOP

NOP

BA

NOP

D0 D1 D2 D3

Begin Autoprecharge

Earliest Bank A reactivate

V58C265804S Rev. 1.3 January 2000

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