MAX2165 查看數據表（PDF） - Maxim Integrated

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MAX2165

Single-Conversion DVB-H Tuner

Maxim Integrated 

Single-Conversion DVB-H Tuner

Table 3. N-Divider Frac2 Register* (Address: 0x01)

BIT NAME

X

BIT LOCATION

(0 = LSB)

7, 6, 5

FUNCTION

Reserved. Set to 000 for normal operation.

FRAC

PLL mode select:

4

1 = Fractional mode selected.

0 = Integer mode selected.

F[19:16]

3–0

Sets the 4 most significant bits of the fractional PLL divider ratio.

*When programming the fractional divider ratio, all three fractional divider registers must be written before the ratio is updated.

Table 4. N-Divider Frac1 Register* (Address: 0x02)

BIT NAME

BIT LOCATION

(0 = LSB)

FUNCTION

F[15:8]

7–0

Sets bits 15 through 8 of the fractional PLL divider ratio.

*When programming the fractional divider ratio, all three fractional divider registers must be written before the ratio is updated.

Table 5. N-Divider Frac0 Register* (Address: 0x03)

BIT NAME

BIT LOCATION

(0 = LSB)

FUNCTION

F[7:0]

7–0

Sets the 8 least significant bits of the fractional PLL divider ratio.

*When programming the fractional divider ratio, all three fractional divider registers must be written before the ratio is updated.

Table 6. Tracking Filter Register (Address: 0x04)

BIT NAME

BIT LOCATION

(0 = LSB)

FUNCTION

TF_NTCH[3:0]

Programs the notch frequency of the internal tracking filter. Optimal values for notch

7–4

frequencies of 783MHz and 725MHz can be read from the ROM table entries. See the

Reading the ROM Table section.

TF_BAL[3:0]

3–0

Programs the tracking filter balun. Optimum values over frequency can be interpolated

from the ROM table entries. See the Reading the ROM Table section.

Table 7. LNA Register (Address: 0x05)

BIT NAME

X

BIT LOCATION

(0 = LSB)

7–1

FUNCTION

Reserved. Set to all zeros for normal operation.

LNASW

LNA enable:

0

1 = LNA is enabled.

0 = LNA is disabled.

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