SY54023ARMG 查看數據表（PDF） - Micrel
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SY54023ARMG Datasheet PDF : 14 Pages
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Micrel, Inc.
SY54023AR
AC Electrical Characteristics
VCCO = 1.14V to 1.26V RL = 50Ω to VCCO,
VCCO = 1.7V to 1.9V, RL = 50Ω to VCCO or 100Ω across the outputs,
VCC = 2.375V to 2.625V. TA = –40°C to +85°C, unless otherwise stated.
Symbol Parameter
Condition
Min
Typ
Max Units
fMAX
Maximum Frequency
NRZ Data
3.2
Gbps
VOUT > 200mV
Clock 3.2
GHz
tPD
Propagation Delay
IN-to-Q Figure 1a
150
210
310
ps
SEL-to-Q Figure 1a
90
200
350
ps
tSkew
Input-to-Input Skew
Output-to-Output skew
Note 6
Note 7
5
20
ps
3
15
ps
Part-to-Part Skew
Note 8
75
ps
tJitter
Data
Random Jitter
Note 9
Deterministic Jitter Note 10
Clock
Cycle-to-Cycle Jitter Note 11
Total Jitter
Note 12
Crosstalk Induced Jitter Note 13
(Adjacent Channel)
1
psRMS
10
psPP
1
psRMS
10
psPP
0.7
psPP
tR tF
Output Rise/Fall Times
(20% to 80%)
At full output swing.
30
60
95
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
6. Input-to-Input skew is the difference in time between both inputs, measured at the same output for the same temperature, voltage and transition.
7. Output-to-Output skew is the difference in time between both outputs, receiving data from the same input, for the same temperature, voltage and
transition.
8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
9. Random jitter is measured with a K28.7 pattern, measured at ≤ fMAX.
10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern.
11. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1,
where T is the time between rising edges of the output signal.
12. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 1012 output edges will deviate by
more than the specified peak-to-peak jitter value.
13. Crosstalk induced jitter is defined as the added jitter that results from signals applied to the adjacent channel. It is measured at the output while
applying a similar, differential clock frequency to both inputs that is asynchronous with respect to each other.
June 2008
6
M9999-062608-A
hbwhelp@micrel.com or (408) 955-1690
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