74HC160PW,118 查看數據表（PDF） - NXP Semiconductors.

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比赛名单

74HC160PW,118

Presettable synchronous BCD decade counter; asynchronous reset

NXP Semiconductors. 

Philips Semiconductors

Presettable synchronous BCD decade

counter; asynchronous reset

Product specification

74HC/HCT160

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

PIN DESCRIPTION

PIN NO.

1

2

3, 4, 5, 6

7

8

9

10

14, 13, 12, 11

15

16

SYMBOL

MR

CP

D0 to D3

CEP

GND

PE

CET

Q0 to Q3

TC

VCC

NAME AND FUNCTION

asynchronous master reset (active LOW)

clock input (LOW-to-HIGH, edge-triggered)

data inputs

count enable input

ground (0 V)

parallel enable input (active LOW)

count enable carry input

flip-flop outputs

terminal count output

positive supply voltage

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

December 1990

3

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