74LVC86AD 查看數據表（PDF） - NXP Semiconductors.

零件编号

产品描述 (功能)

比赛名单

74LVC86AD

Quad 2-input EXCLUSIVE-OR gate

NXP Semiconductors. 

Philips Semiconductors

Quad 2-input EXCLUSIVE-OR gate

Product specification

74LVC86A

handbookA, halfpage

B

Y

MNA788

Fig.5 Logic diagram (one gate).

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

VCC

supply voltage

VI

VO

Tamb

tr, tf

input voltage

output voltage

operating ambient temperature

input rise and fall times

CONDITIONS

MIN.

for maximum speed performance 2.7

for low-voltage applications

1.2

0

0

in free air

−40

VCC = 1.2 to 2.7 V

0

VCC = 2.7 to 3.6 V

0

MAX.

3.6

3.6

5.5

VCC

+125

20

10

UNIT

V

V

V

V

°C

ns/V

ns/V

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL

VCC

IIK

VI

IOK

VO

IO

ICC, IGND

Tstg

Ptot

PARAMETER

supply voltage

input diode current

input voltage

output diode current

output voltage

output source or sink current

VCC or GND current

storage temperature

power dissipation

CONDITIONS

VI < 0

note 1

VO > VCC or VO < 0

note 1

VO = 0 to VCC

Tamb = −40 to +125 °C; note 2

MIN.

−0.5

−

−0.5

−

−0.5

−

−

−65

−

MAX.

+6.5

−50

+6.5

±50

VCC + 0.5

±50

±100

+150

500

UNIT

V

mA

V

mA

V

mA

mA

°C

mW

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. For SO14 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.

For (T)SSOP14 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.

For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K.

2004 Mar 04

5

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