74LV595(2016) 查看數據表（PDF） - NXP Semiconductors.
零件编号
产品描述 (功能)
比赛名单
74LV595
(Rev.:2016)
(Rev.:2016)
NXP Semiconductors.
74LV595 Datasheet PDF : 20 Pages
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Nexperia
74LV595
8-bit serial-in/serial-out or parallel-out shift register; 3-state
11. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay SHCP to Q7S; see Figure 8
[2]
VCC = 1.2 V
-
95
-
VCC = 2.0 V
-
32
61
VCC = 2.7 V
-
24
45
VCC = 3.3 V; CL = 15 pF
-
15
-
VCC = 3.0 V to 3.6 V
[3]
-
18
36
STCP to Qn; see Figure 9
[2]
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
MR to Q7S; see Figure 11
-
-
-
-
[3]
-
100
-
34
65
25
48
16
-
19
38
ten
enable time
tdis
disable time
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
OE to Qn; see Figure 12
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
OE to Qn; see Figure 12
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
[3]
-
[4]
-
-
-
-
[5]
-
-
-
[3]
-
85
-
29
56
21
41
14
-
16
33
85
-
29
56
21
41
16
33
65
-
24
40
18
32
14
26
40 C to +125 C Unit
Min
Max
-
-
ns
-
75 ns
-
55 ns
-
-
ns
-
44 ns
-
-
ns
-
77 ns
-
56 ns
-
-
ns
-
45 ns
-
-
ns
-
66 ns
-
49 ns
-
-
ns
-
33 ns
-
-
ns
-
66 ns
-
49 ns
-
39 ns
-
-
ns
-
49 ns
-
37 ns
-
30 ns
74LV595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 18 March 2016
© Nexperia B.V. 2017. All rights reserved
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