IR3638SPBF 查看數據表（PDF） - International Rectifier

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IR3638SPBF

HIGH FREQUENCY SYNCHRONOUS PWM BUCK CONTROLLER FOR TRACKING APPLIACTIONS

International Rectifier 

Power MOSFET Selection (Cont..)

The IRF8910 has the following data:

Vds = 20V, Id =10A

Rds(on) =13.4mΩ @Vgs =10V

The conduction losses will be: Pcon=0.724W

The switching loss is more difficult to calculate,

even though the switching transition is well

understood. The reason is the effect of the

parasitic components and switching times during

the switching procedures such as turn-on / turn-

off delays and rise and fall times. The control

MOSFET contributes to the majority of the

switching losses in synchronous Buck converter.

The synchronous MOSFET turns on under zero

voltage conditions, therefore, the turn on losses

for synchronous MOSFET can be neglected.

With a linear approximation, the total switching

loss can be expressed as:

Psw

= Vds(off )

2

* tr + tf

T

* Iload

- - - (7)

Where:

V ds(off) = Drain to source voltage at the off time

tr = Rise time

tf = Fall time

T = Switching period

Iload = Load current

The switching time waveforms is shown in

figure9.

VDS

90%

10%

VGS

td(ON)

tr td(OFF)

tf

Fig. 9: switching time waveforms

From IRF8910 data sheet:

tr = 10ns, tf = 4.1ns

These values are taken under a certain condition

test. For more details please refer to the IRF8910

data sheet.

By using equation (7), we can calculate the

switching losses. Psw=0.37W

3/19/07

IR3638SPbF

Feedback Compensation

The IR3638 is a voltage mode controller; the

control loop is a single voltage feedback path

including error amplifier and error comparator. To

achieve fast transient response and accurate

output regulation, a compensation circuit is

necessary. The goal of the compensation

network is to provide a closed loop transfer

function with the highest 0dB crossing frequency

and adequate phase margin (greater than 45o).

The output LC filter introduces a double pole, –

40dB/decade gain slope above its corner

resonant frequency, and a total phase lag of 180o

(see figure 10). The resonant frequency of the LC

filter expressed as follows:

FLC

=

2 ∗π

1

Lo ∗Co

- - - (8)

Figure 10 shows gain and phase of the LC filter.

Since we already have 180o phase shift just from

the output filter, the system risks being unstable.

Gain

0dB

Phase

0

-40dB/decade

-180

FLC Frequency

FLC Frequency

Fig. 10: Gain and Phase of LC filter

The IR3638’s error amplifier is a differential-input

transconductance amplifier. The output is

available for DC gain control and AC phase

compensation.

The error amplifier can be compensated either in

type II or typeIII compensation. When it is used in

typeII compensation the transconductance

properties of the error amplifier become evident

and can be used to cancel one of the output filter

poles. This will be accomplished with a series RC

circuit from Comp pin to ground as shown in

figure 11.

This method requires that the output capacitor

should have enough ESR to satisfy stability

requirements. In general the output capacitor’s

ESR generates a zero typically at 5kHz to 50kHz

which is essential for an acceptable phase

margin.

11

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