ADV7612 查看數據表（PDF） - Analog Devices

零件编号

产品描述 (功能)

比赛名单

ADV7612

Dual Port, Xpressview, 225 MHz HDMI Receiver

Analog Devices 

ADV7612

Timing Diagrams

t3

SDA

t5

t3

SCL

t6

t1

t2

t7

t4

t8

Figure 3. I2C Timing

t9

t10

LLC

P0 TO P23, HS,

VS/FIELD/ALSB, DE

t11

t12

Figure 4. Pixel Port and Control SDR Output Timing

SCLK

LRCLK

I2S

LEFT-JUSTIFIED

MODE

I2S

I2S MODE

I2S

RIGHT-JUSTIFIED

MODE

t15

t16

t17

t18

t19

MSB

MSB – 1

t20

t19

MSB

MSB – 1

t20

MSB

NOTES

1. LRCLK IS A SIGNAL ACCESSIBLE VIA AP5 PIN.

2. I2S SIGNALS ARE ACCESSIBLE VIA THE AP1 TO AP4 PINS.

Figure 5. I2S Timing

t19

t20

LSB

Data Sheet

Rev. E | Page 6 of 20

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