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W173 查看數據表(PDF) - Silicon Laboratories

零件编号
产品描述 (功能)
比赛名单
W173
Silabs
Silicon Laboratories Silabs
W173 Datasheet PDF : 5 Pages
1 2 3 4 5
W173
Absolute Maximum Ratings[2]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Table 1:
Parameter
VDD, VIN
TSTG
TB
TA
Description
Voltage on Any Pin with Respect to GND
Storage Temperature
Ambient Temperature under Bias
Operating Temperature
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
–55 to +125
°C
0 to +70
°C
DC Electrical Characteristics: TA = 0°C to +70°C, VDD = 3.3V±5%
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
IDD
Supply Current
Note: CLK output = 50.0 MHz
output loaded
40
mA
VIL
Input Low Voltage
VCC = 5.0V
VIH
Input High Voltage
VCC = 5.0V
VOL
Output Low Voltage
IOL = 1 mA
VOH
Output High Voltage
IOH = –1 mA
IIL
Input Low Current
IIH
Input High Current
RP
Input Pull-up Resistor
VIN = 0V
CI
Input Capacitance
Except X1 and X2
LI
Input Inductance
Except X1 and X2
CL
XTAL Load Capacitance
Total load to crystal
0.8
V
2.0
V
50
mV
3.1
V
10
µA
10
µA
500
k
6
pF
7
nH
12
pF
AC Electrical Characteristics: TA = 0°C to +70°C, VCC = 3.3V±5%[3]
Parameter
Description
Test Condition
Min. Typ. Max.
Unit
Clock Outputs
tJC
Output Clock Jitter, Cycle-to-Cycle Excluding 13.2-MHz output
±175 ±250
ps
ZO
Output Buffer Impedance
40
W
dT
Output Duty Cycle
45
50
55
%
tR
Rise Time
Between 0.4V and 2.4V
0.8
1.5
4.0
V/ns
tF
Fall Time
Between 2.4V and 0.4V
0.8
1.5
4.0
V/ns
tPU
Stabilization Time from Power-Up To within 0.1% of final frequency
1.5
3.0
ms
fA
Long Term Output Frequency
Over VCC and TA range
Stability
0.01
%
Note:
2. Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. All AC tests are performed using the circuit shown in Figure 1 to simulate typical system load conditions. Measurements are taken at the load. Threshold voltage
for timing measurements is 1.5V.
......... Document #: 38-07313 Rev. *B Page Page 4 of 5 of 5

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