LY622568 查看數據表（PDF） - Unspecified

零件编号

产品描述 (功能)

比赛名单

LY622568

256K X 8 BIT LOW POWER CMOS SRAM

Unspecified 

®

Rev. 2.2

LY622568

256K X 8 BIT LOW POWER CMOS SRAM

DATA RETENTION CHARACTERISTICS

PARAMETER SYMBOL

TEST CONDITION

VCC for Data Retention VDR CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V

Data Retention Current

LL

VCC = 1.5V

IDR

CE# ≧ VCC - 0.2V

or CE2 ≦ 0.2V

25℃

SL

40℃

Other pins at 0.2V or VCC-0.2V

SL

Chip Disable to Data

Retention Time

tCDR

See Data Retention

Waveforms (below)

Recovery Time

tR

tRC* = Read Cycle Time

DATA RETENTION WAVEFORM

Low Vcc Data Retention Waveform (1) (CE# controlled)

MIN.

1.5

-

-

-

-

0

tRC*

TYP.

-

1

1

MAX.

5.5

20

4

UNIT

V

µA

µA

1

4

µA

1

15 µA

-

-

ns

-

-

ns

Vcc

CE#

Vcc(min.)

tCDR

VIH

VDR ≧ 1.5V

CE# ≧ Vcc-0.2V

Vcc(min.)

tR

VIH

Low Vcc Data Retention Waveform (2) (CE2 controlled)

Vcc

CE2

Vcc(min.)

tCDR

VIL

VDR ≧ 1.5V

CE2 ≦ 0.2V

Vcc(min.)

tR

VIL

Lyontek Inc. reserves the rights to change the specifications and products without notice.

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

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