LTC4441 查看數據表（PDF） - Linear Technology

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LTC4441

N-Channel MOSFET Gate Driver

Linear Technology 

LTC4441/LTC4441-1

Applications Information

Overview

Power MOSFETs generally account for the majority of

power lost in a converter. It is important to choose not only

the type of MOSFET used, but also its gate drive circuitry.

The LTC4441/LTC4441-1 is designed to drive an N-channel

power MOSFET with little efficiency loss. The LTC4441/

LTC4441-1 can deliver up to 6A of peak current using a

combined NPN Bipolar and MOSFET output stage. This

helps to turn the power MOSFET fully “on” or “off” with

a very brief transition region.

The LTC4441/LTC4441-1 includes a programmable linear-

regulator to regulate the gate drive voltage. This regulator

provides the flexibility to use either standard threshold or

logic level MOSFETs.

DRVCC Regulator

An internal, P-channel low dropout linear regulator provides

the DRVCC supply to power the driver and the pre-driver

logic circuitry as shown in Figure 1. The regulator output

voltage can be programmed between 5V and 8V with an

external resistive divider between DRVCC and SGND and a

center tap connected to the FB pin. The regulator needs an

R1 value of around 330k to ensure loop stability; the value

of R2 can be varied to achieve the required DRVCC voltage:

R2 = 406k

DRVCC − 1.21V

The DRVCC regulator can supply up to 100mA and is

short-circuit protected. The output must be bypassed

to the PGND pin in very close proximity to the IC pins

with a minimum of 10µF ceramic, low ESR (X5R or X7R)

capacitor. Good bypassing is necessary as high transient

supply currents are required by the driver. If the input

supply voltage, VIN, is close to the required gate drive

voltage, this regulator can be disabled by connecting the

DRVCC and FB pins to VIN.

VIN

R1

330k

FB

R2

1.21V

–

REG

+

LTC4441

MREG

1.09V

UVLO

ENABLE

DRIVER

DRVCC

OUT

DRIVER

CVCC

PGND

4441 F01

Figure 1. DRVCC Regulator

The LTC4441/LTC4441-1 monitors the FB pin for DRVCC’s

UVLO condition (UVLO in Figure 1). During power-up, the

driver output is held low until the DRVCC voltage reaches

90% of the programmed value. Thereafter, if the DRVCC

voltage drops more than 20% below the programmed

value, the driver output is forced low.

Logic Input Stage

The LTC4441/LTC4441-1 driver employs TTL/CMOS com-

patible input thresholds that allow a low voltage digital

signal to drive standard power MOSFETs. The LTC4441/

LTC4441-1 contains an internal voltage regulator that

biases the input buffer, allowing the input thresholds (VIH

= 2.4V, VIL = 1.4V) to be independent of the programmed-

driver supply, DRVCC, or the input supply, VIN. The 1V

hysteresis between VIH and VIL eliminates false triggering

due to noise during switching transitions. However, care

should be taken to isolate this pin from any noise pickup,

especially in high frequency, high voltage applications.The

LTC4441/LTC4441-1 input buffer has high input impedance

and draws negligible input current, simplifying the drive

circuitry required for the input. This input can withstand

voltages up to 15V above and below ground. This makes

the chip more tolerant to ringing on the input digital signal

caused by parasitic inductance.

44411fa

9

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