MB90P678PF 查看數據表（PDF） - Fujitsu
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MB90P678PF Datasheet PDF : 106 Pages
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MB90670/675 Series
s PIN DESCRIPTION
LQFP
-80*1
Pin no.
QFP
-80*2
LQFP
-100*3
QFP
-100*4
Pin name Circuit type
Function
62
64
80
82 X0
63
65
81
83 X1
A
(Oscillation)
Crystal oscillator pins
39 to 41
41 to 43
47 to 49
49 to 51
MD0 to
MD2
60
62
75
77 RST
F
Input pins for selecting operation modes
(CMOS) Connect directly to VCC or VSS.
H
(CMOS/H)
External reset request input
42
44
50
52 HST
G
(CMOS/H)
Hardware standby input pin
P00 to P07
65 to 72 67 to 74 83 to 90 85 to 92
AD00 to
AD07
B
(CMOS)
General-purpose I/O port
This function is valid in the single-chip mode.
I/O pins for the lower 8-bit of the external ad-
dress data bus
This function is valid in the mode where the ex-
ternal bus is valid.
P10 to P15,
P16, P17
General-purpose I/O port
This function is valid in the single-chip mode.
AD08 to
AD13,
AD14,
73 to 78, 75 to 80, 91 to 96, 93 to 98, AD15
79, 80 1, 2 97, 98 99, 100
WI0 to WI5,
WI6, WI7
B
(CMOS)
I/O pins for the upper 8-bit of the external ad-
dress data bus
This function is valid in the mode where the ex-
ternal bus is valid.
I/O pins for wake-up interrupts
This function is valid in the single-chip mode.
Because the input of the DTP/external inter-
rupt circuit is used as required when the DTP/
external interrupt circuit is enabled, and it is
necessary to stop outputs by other functions
unless such outputs are made intentionally.
P20, P21,
P22, P23
1, 2, 3, 4
3, 4, 5, 6
99, 100,
1, 2
1, 2, 3, 4
A16, A17,
A18, 19
B
(CMOS)
General-purpose I/O port
This function becomes valid in the single-chip
mode or the external address output control
register is set to select a port.
Output pins for the external address bus of A16
to A19
This function is valid in the mode where the ex-
ternal bus is valid and the upper address con-
trol register is set to select an address.
(Continued)
*1: FPT-80P-M05
*2: FPT-80P-M06
*3: FPT-100P-M05
*4: FPT-100P-M06
13
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