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LC863448A 查看數據表(PDF) - SANYO -> Panasonic

零件编号
产品描述 (功能)
比赛名单
LC863448A
SANYO
SANYO -> Panasonic SANYO
LC863448A Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC863448A/40A
Terminal
I/O
Function Description
Port 7
•4-bit input/output port
P70
I/O
Input or output can be specified for each bit
P71 - P73
P70: I/O with programmable pull-up resister
P71 to P73: CMOS output/input with programmable pull-up
resister
•Other function
P70 INT0 input/HOLD release input/
Nch-Tr. output for wachdog timer
P71 INT1 input/HOLD release input
P72 INT2 input/Timer 0 event input
P73 INT3 input (noise rejection filter connected)/
Timer 0 event input
Interrupt receiver format, vector addresses
rising falling rising/ H level L level vector
falling
INT0 enable enable disable enable enable 03H
INT1 enable enable disable enable enable 0BH
INT2 enable enable enable disable disable 13H
INT3 enable enable enable disable disable 1BH
Note: A capacitor of at least 10µF must be inserted between VDD and VSS when using this IC.
Option
Output form and existance of pull-up resistor for all ports can be specified for each bit.
Programmable pull-up resistor is always connected regardless of port option, CMOS or N-ch open drain output
in port 1.
Port status in reset
Terminal
Port 0
Port 1
I/O
Pull-up resistor status at selecting CMOS output option
I
Pull-up resistor OFF, ON after reset release
I
Programmable pull-up resistor OFF
8/20
Ver. 0.90

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