CXA2074S 查看數據表（PDF） - Sony Semiconductor

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CXA2074S

US Audio Multiplexing Decoder

Sony Semiconductor 

CXA2074Q/S

I2C BUS block items (SDA, SCL)

No.

Item

Symbol Min. Typ. Max. Unit

1 High level input voltage

2 Low level input voltage

VIH

3.0 — 5.0

VIL

0

— 1.5

V

3 High level input current

4 Low level input current

IIH

—

—

10

µA

IIL

—

—

10

5 Low level output voltage SDA (Pin 9) during 3mA inflow VOL

6 Maximum inflow current

IOL

7 Input capacitance

CI

0

— 0.4

V

3

—

—

mA

—

—

10

pF

8 Maximum clock frequency

9 Minimum waiting time for data change

fSCL

0

— 100 kHz

tBUF

4.7

—

—

10 Minimum waiting time for start of data transfer

11 Low level clock pulse width

12 High level clock pulse width

13 Minimum waiting time for start preparation

14 Minimum data hold time

tHD: STA 4.0

—

—

tLOW

4.7

—

—

µs

tHIGH

4.0

—

—

tSU: STA 4.7

—

—

tHD: DAT 0

—

—

15 Minimum data preparation time

16 Rise time

tSU: DAT 250 —

—

ns

tR

—

—

1

µs

17 Fall time

18 Minimum waiting time for stop preparation

tF

—

— 300

ns

tSU: STO 4.7

—

—

µs

I2C BUS load conditions: Pull-up resistor 4kΩ (Connect to +5V)

Load capacity 200pF (Connect to GND)

I2C BUS Control Signal

SDA

tBUF

tR

SCL

P

S tHD: STA tLOW

tF

tHD: DAT tHIGH

tSU: DAT

tHD: STA

tSU: STA

Sr

tSU: STO

P

– 16 –

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