P4C168L-25FM 查看數據表（PDF） - Semiconductor Corporation
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P4C168L-25FM Datasheet PDF : 14 Pages
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P4C168/P4C168L, P4C169, P4C170
AC CHARACTERISTICS—READ CYCLE (CONTINUED)
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym Parameter
-45
-55
-70
Unit
Min Max Min Max Min Max
tRC Read Cycle Time
45
55
70
ns
tAA Address Access Time
45
55
70 ns
tAC§ Chip Enable Access Time
45
55
70 ns
tAC‡ Chip Select Access Time
25
30
35 ns
tOH Output Hold from Address Change
2
2
2
ns
tLZ‡ Chip Enable to Output in Low Z
2
2
2
ns
tHZ† Chip Disable to Output in High Z
25
25
30 ns
tOE† Output Enable to Data Valid
20
25
30 ns
t†
OLZ
Output Enable to Output in Low Z
t†
OHZ
Output Disable to Output in High Z
0
0
0
ns
20
25
30 ns
tRCS Read Command Setup Time
0
0
0
ns
tRCH Read Command Hold Time
0
0
0
ns
tPU§ Chip Enable to Power Up Time
0
0
0
ns
tPD§ Chip Disable to Power Down Time
45
55
70 ns
§ P4C168 only
† P4C170 only
‡ Chip Select/Deselect for P4C169 and P4C170
Timing Waveform of Read Cycle No. 1 (ADDRESS controlled)(5,6)
Notes:
5. WE is HIGH for READ cycle.
6. CE/CS and OE are LOW for READ cycle.
Document # SRAM107 REV E
Page 4 of 14
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