74AHC30-Q100 查看數據表（PDF） - NXP Semiconductors.
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74AHC30-Q100 Datasheet PDF : 15 Pages
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NXP Semiconductors
74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
6. Functional description
Table 3. Function table[1]
Input
Output
A
B
C
D
E
F
G
H
Y
L
X
X
X
X
X
X
X
H
X
L
X
X
X
X
X
X
H
X
X
L
X
X
X
X
X
H
X
X
X
L
X
X
X
X
H
X
X
X
X
L
X
X
X
H
X
X
X
X
X
L
X
X
H
X
X
X
X
X
X
L
X
H
X
X
X
X
X
X
X
L
H
H
H
H
H
H
H
H
H
L
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
VI
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V
VO <0.5 V or VO > VCC + 0.5 V
VO =0.5 V to (VCC + 0.5 V)
Tamb = 40 C to +125 C
0.5
0.5
[1] 20
[1] 20
25
-
75
65
[2] -
+7.0
V
+7.0
V
-
mA
+20
mA
+25
mA
+75
mA
-
mA
+150
C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For TSSOP14 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN14 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.
74AHC_AHCT30_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 November 2013
© NXP B.V. 2013. All rights reserved.
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