7314-DL 查看數據表（PDF） - Unspecified

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7314-DL

4-Channel Input Audio Processor

Unspecified 

4-Channel Input Audio Processor

7314

FUNCTIONAL DESCRIPTION

BUS INTERFACE

Data are transmitted to and from the microprocessor to the 7314 via the DATA and CLK. The DATA

and CLK make up the BUS Interface. It should be noted that the pull-up resistors must be connected to

the positive supply voltage.

DATA VALIDITY

A data on the DATA Line is considered valid and stable only when the CLK Signal is in HIGH State. The

HIGH and LOW State of the DATA Line can only change when the CLK signal is LOW. Please refer to

the figure below.

DATA

CLK

DATA LINE

DATA

STABLE,

CHANGE

DATA VALID ALLOWED

START AND STOP CONDITIONS

A Start Condition is activated when

1) the CLK is set to HIGH and

2) DATA shifts from HIGH to LOW State.

The Stop Condition is activated when

1) CLK is set to HIGH and

2) DATA shifts from LOW to HIGH State. Please refer to the timing diagram below.

CLK

DATA

START

STOP

BYTE FORMAT

Every byte transmitted to the DATA Line consist of 8 bits. Each byte must be followed by an

Acknowledge Bit. The MSB is transmitted first.

7314 V1.0

-5-

January, 2007

Free Datasheet http://www.datasheet4u.com/

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