74F51 查看數據表（PDF） - Philips Electronics
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74F51 Datasheet PDF : 8 Pages
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Philips Semiconductors
Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate
Product specification
74F51
TYPE
74F51
TYPICAL
PROPAGATION
DELAY
3.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
3.5mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
14-pin plastic DIP
N74F51N
14-pin plastic SO
N74F51D
PKG DWG #
SOT27-1
SOT108-1
PIN CONFIGURATION
D0a 1
D1a 2
D1b 3
D1c 4
D1d 5
Q1 6
GND 7
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
Dna, Dnb, Dnc, Dnd, Dne, Dnf Data inputs
1.0/1.0
Q0, Q1
Data outputs
50/33
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
14 VCC
13 D0c
12 D0b
11 D0f
10 D0e
9 D0d
8 Q0
SF00085
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0mA/20mA
1 12 13 9 10 11 2 3 4 5
D0a D0b D0c D0d D0e D0f D1a D1b D1c D1d
Q0
Q1
8
VCC = Pin 14
GND = Pin 7
LOGIC DIAGRAM
D0a 1
12
D0b
13
D0c
D0d 9
10
D0e
11
D0f
2
D1a
3
D1b
4
D1c
5
D1d
VCC = Pin 14
GND = Pin 7
6
SF00086
8
Q0
6
Q1
SF00088
9
&
1
10
11
8
13
&
12
1
2
&
1
3
6
4
&
5
SF00087
FUNCTION TABLE FOR 3-INPUT GATES
INPUTS
D0a D0b D0c D0d D0e D0f
H
H
H
X
X
X
X
X
X
H
H
H
All other combinations
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
OUTPUT
Q0
L
L
H
FUNCTION TABLE FOR 2-INPUT GATES
INPUTS
OUTPUT
D1a
D1b
D1c
D1d
Q1
H
H
X
X
L
X
X
H
H
L
All other combinations
H
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
March 3, 1989
2
853–0054 95962
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