HD74HC138FPEL 查看數據表（PDF） - Renesas Electronics

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HD74HC138FPEL

3-to-8-line Decoder/Demultiplexer with Address Latch

Renesas Electronics 

HD74HC138

Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)

Item

Propagation delay

time

Output rise/fall

time

Input capacitance

Symbol VCC (V)

2.0

tPHL

4.5

6.0

2.0

tPLH

4.5

6.0

2.0

tPHL

4.5

6.0

2.0

tPLH

4.5

6.0

2.0

tPHL

4.5

6.0

2.0

tPLH

4.5

6.0

2.0

tTLH, tTHL 4.5

6.0

Cin

—

Ta = 25°C

Ta = –40 to +85°C Unit

Min Typ Max Min Max

Test Conditions

— — 175 —

220

— 17 35

—

44 ns

— — 30

—

37

— — 150 —

190

A, B or C to Y

— 16 30

—

38 ns

— — 26

—

33

— — 150 —

190

— 16 30

—

38 ns

— — 26

—

33

— — 150 —

190

G1 to Y

— 17 30

—

38 ns

— — 26

—

33

— — 175 —

220

— 15 35

—

44 ns

— — 30

—

37

— — 150 —

190

G2A or G2B to Y

— 17 30

—

38 ns

— — 26

—

33

— — 75

—

90

— 5 15

—

19 ns

— — 13

—

16

— 5 10

—

10 pF

Test Circuit

Measurement point

CL*

Note: CL includes the probe and fig capacitance.

REJ03D0570-0300 Rev.3.00 Mar 25, 2009

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