SAB-C505C-2RM 查看數據表（PDF） - Siemens AG

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SAB-C505C-2RM

8-Bit CMOS Microcontroller

Siemens AG 

C505 / C505C

C505A / C505CA

Timer/Counter 2 with Compare/Capture/Reload

The timer 2 of the C505 provides additional compare/capture/reload features. which allow the

selection of the following operating modes:

– Compare : up to 4 PWM signals with 16-bit/300 ns resolution (@ 20 MHz clock)

– Capture : up to 4 high speed capture inputs with 300 ns resolution

– Reload : modulation of timer 2 cycle time

The block diagram in figure 11 shows the general configuration of timer 2 with the additional

compare/capture/reload registers. The I/O pins which can used for timer 2 control are located as

multifunctional port functions at port 1.

P1.5/

T2EX

Sync.

P1.7/

T2

Sync.

OSC f OSC

÷6

÷12

T2PS

T2I0

T2I1

&

EXF2

EXEN2

Reload Reload

Timer 2

TL2 TH2

1

Interrupt

Request

TF2

Compare

16 Bit

Comparator

16 Bit

Comparator

16 Bit

Comparator

16 Bit

Comparator

Capture

CCL3/CCH3

CCL2/CCH2

CCL1/CCH1

CRCL/CRCH

Input/

Output

Control

P1.0/

INT3/

CC0

P1.1/

INT4/

CC1

P1.2/

INT5/

CC2

P1.2/

INT6/

CC3

MCB02730

Figure 11

Timer 2 Block Diagram

Semiconductor Group

31

1997-12-01

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