TDA7437N_03 查看數據表（PDF） - STMicroelectronics

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TDA7437N_03

DIGITALLY CONTROLLED AUDIO PROCESSOR

STMicroelectronics 

TDA7437N

SOFTWARE SPECIFICATION

Interface Protocol

The interface protocol comprises:

s A start condition (s)

s A chip address byte,(the LSB bit determines read (=1)/write (=0) transmission)

s A subaddress byte.

s A sequence of data (N-bytes + acknowledge)

s A stop condition (P)

CHIP ADDRESS

SUBADDRESS

DATA 1 to DATA n

MSB

LSB

MSB

LSB

MSB

S 1 0 0 0 1 0 A R/W ACK X X X I A3 A2 A1 A0 ACK

ACK = Acknowledge; S = Start; P = Stop; I = Auto Increment; X = Not used

MAX CLOCK SPEED 500kbits/s

ADDRpin open

A=0

ADDRpin close to Vs A = 1

DATA

LSB

ACK P

AUTO INCREMENT

If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled

SUBADDRESS (receive mode)

MSB

LSB

FUNCTION

X

X

X

I

A3

A2

A1

A0

0

0

0

0

Input Selector

0

0

0

1

Loudness

0

0

1

0

Volume

0

0

1

1

Bass, Treble

0

1

0

0

Speaker Attenuator LF

0

1

0

1

Speaker Attenuator LR

0

1

1

0

Speaker Attenuator RF

0

1

1

1

Speaker Attenuator RR

1

0

0

0

Input Gain Middle

1

0

0

1

Mute

TRANSMITTED DATA

Send Mode

MSB

LSB

X

X

X

X

X

SM

ZM

P

P = Pause (Active low)

ZM = Zero crossing muted (HIGH active)

SM = Soft mute activated (HIGH active)

X = Not used

The transmitted data is automatically updated after each ACK.

Transmission can be repeated without new chipaddress.

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