RT5370 查看數據表（PDF） - Unspecified

零件编号

产品描述 (功能)

比赛名单

RT5370

CMOS Technology with PA, LNA, RF, Baseband, and MAC Integrated

Unspecified 

3 Register map

RT5370

Datasheet

Revision August 30, 2010

distributed

register

SRAM (2KB)

SRAM (8KB)

SRAM

(16KB)

USB controller (200h)

SCH/DMA register (200h)

SYS/PBF/FCE/MISC register (400h)

Reserved (800h)

MAC register (800h)

MAC search table(800h)

Program memory (2000h)

Security table (4000h)

( SYS_CTRL [19] SHR_MSEL = 0 )

0000 h

0200 h

0400 h

0800 h

1000 h

1800 h

2000 h

4000 h

SRAM (8KB)

Beacon frame (2000h)

( SYS_CTRL [19] SHR_MSEL = 1 )

4000 h

See PBF Registers - SYS_CTRL

(Offset 0x0400) for detail description of SHR_MSEL.

8000 h

SRAM

Packet buffer

DSRT5370_ V1. 0_083010

Form No.：QS-073-F02

Rev.：1

Kept by： DCC

-6-

Ret. Time： 5 Years

Draft

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