2SJ574BPTL-E(2014) 查看數據表（PDF） - Renesas Electronics

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2SJ574BPTL-E
(Rev.:2014)

Silicon P Channel MOS FET High Speed Switching

Renesas Electronics 

2SJ574

Preliminary

Electrical Characteristics

(Ta = 25°C)

Item

Symbol Min

Typ

Max Unit

Test Conditions

Drain to source breakdown voltage V(BR)DSS –30

—

—

V ID = –100 μA, VGS = 0

Gate to source breakdown voltage V(BR)GSS ±20

—

—

V IG = ±100 μA, VDS = 0

Zero gate voltage drain current

IDSS

—

—

–1

μA VDS = –30 V, VGS = 0

Gate to source leak current

IGSS

—

—

±5

μA VGS = ±16 V, VDS = 0

Gate to source cutoff voltage

Static drain to source on state

resistance

Forward transfer admittance

VGS(off)

–1.3

—

–2.3

V ID = –10 μA, VDS = –5 V

RDS(on)

—

1.1

1.3

Ω ID = –150 mA, VGS = –10 V Note 3

RDS(on)

—

2.2

3.1

Ω ID = –150 mA, VGS = –4 V Note 3

|yfs|

195

300

—

mS ID = –150 mA, VDS = –10 V Note 3

Input capacitance

Output capacitance

Reverse transfer capacitance

Ciss

—

50

—

pF VDS = –10 V

Coss

—

40

—

pF VGS = 0

Crss

—

15

—

pF f = 1 MHz

Turn-on delay time

Rise time

td(on)

—

20

—

ns ID = –150 mA, VGS = –10 V

tr

—

50

—

ns RL = 66.6 Ω

Turn-off delay time

td(off)

—

110

—

ns

Fall time

tf

—

105

—

ns

Note: 3. Pulse test

R07DS0574EJ0500 Rev.5.00

Jan 10, 2014

Page 2 of 7

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