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SPT7861 查看數據表(PDF) - Cadeka Microcircuits LLC.

零件编号
产品描述 (功能)
比赛名单
SPT7861
CADEKA
Cadeka Microcircuits LLC. CADEKA
SPT7861 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
DIGITAL OUTPUTS
OVERRANGE OUTPUT
The digital outputs (D0D10) are driven by a separate
supply (OVDD) ranging from +3 V to +5 V. This feature
makes it possible to drive the SPT7861s TTL/CMOS-
compatible outputs with the users logic system supply.
The format of the output data (D0D9) is straight binary.
(See table III.) The outputs are latched on the rising edge
of CLK. These outputs can be switched into a tri-state
mode by bringing EN high.
Table III Output Data Information
ANALOG INPUT OVERRANGE OUTPUT CODE
D10
D9D0
+F.S. + 1/2 LSB
1
11 1111 1111
+F.S. 1/2 LSB
0
1 1 1 1 1 1 1 1 1Ø
+1/2 F.S.
0
ØØ ØØØØ ØØØØ
+1/2 LSB
0
00 0000 000Ø
0.0 V
0
00 0000 0000
(Ø indicates the flickering bit between logic 0 and 1.)
The OVERRANGE OUTPUT (D10) is an indication that
the analog input signal has exceeded the positive full-
scale input voltage by 1 LSB. When this condition occurs,
D10 will switch to logic 1. All other data outputs (D0 to D9)
will remain at logic 1 as long as D10 remains at logic 1.
This feature makes it possible to include the SPT7861 in
higher resolution systems.
EVALUATION BOARD
The EB7861 evaluation board is available to aid designers
in demonstrating the full performance of the SPT7861.
This board includes a reference circuit, clock driver circuit,
output data latches, and an on-board reconstruction of the
digital data. An application note describing the operation
of this board, as well as information on the testing of the
SPT7861, is also available. Contact the factory for price
and availability.
SPT7861
9
6/25/01

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