M24256-BFDW6G(2012) 查看數據表（PDF） - STMicroelectronics

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比赛名单

M24256-BFDW6G
(Rev.:2012)

256-Kbit serial I²C bus EEPROM

STMicroelectronics 

M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF

4

Device operation

Device operation

The device supports the I2C protocol. This is summarized in Figure 6. Any device that sends

data on to the bus is defined to be a transmitter, and any device that reads the data to be a

receiver. The device that controls the data transfer is known as the bus master, and the

other as the slave device. A data transfer can only be initiated by the bus master, which will

also provide the serial clock for synchronization. The device is always a slave in all

communications.

Figure 6. I2C bus protocol

SCL

SDA

START

Condition

SDA

Input

SDA

Change

STOP

Condition

SCL

SDA

1

2

3

MSB

START

Condition

SCL

SDA

1

2

3

MSB

7

8

9

ACK

7

8

9

ACK

STOP

Condition

AI00792B

Doc ID 6757 Rev 30

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