MD56V62160E 查看數據表（PDF） - LAPIS Semiconductor Co., Ltd.

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MD56V62160E

4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM

LAPIS Semiconductor Co., Ltd. 

FEDD56V62160E-07

MD56V62160E

TIMING CHART

Read & Write Cycle (Same Bank) @CAS Latency  2, Burst Length  4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

CLK

tRC

CKE

CS

tRP

RAS

tRCD

CAS

ADDR

A12,

A13

Ra

Ca0

Rb

Cb0

A10

Ra

Rb

tOH

DQ

Qa0 Qa1 Qa2 Qa3

Db0 Db1 Db2 Db3

tAC

tOH

WE

UDQM,

LDQM

Row Active

Read Command

Row Active

Precharge Command

Write Command

Precharge Command

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