HI1826 查看數據表（PDF） - Intersil

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HI1826

6-Bit, 140 MSPS, Flash A/D Converter

Intersil 

Pin Descriptions

PIN NO. SYMBOL I/O

16, 19, AGND

-

22, 25

TYPICAL

VOLTAGE

LEVEL

0V

15, 26

AVEE

-

-5.2V

HI1826

EQUIVALENT CIRCUIT

28

CLKP

I

27

CLKN

ECL

DGND1

CLKP

R

R

R

R

CLKN

DESCRIPTION

Analog GND. Used as GND for input

buffers and latches of comparators.

Separated from DGND1 and DGND2.

Analog VEE. Typical voltage is -5.2V.

Connected internally with DVEE.

(Resistance is 4 to 6Ω.) Connect to

AGND through a ceramic chip capacitor

of 0.1µF or more just near the pin.

CLK Input.

CLK Complementary Input. When left

open, voltage goes to ECL threshold

potential (-1.3V). Although only CLKP

input can be used for operation with

CLKN input open, complementary input

is recommended in order to attain high

speed and stable operation.

DVEE

1, 8

DGND1

-

2, 7

DGND2

-

12, 29

DVEE

-

0V

0V

-5.2V

RR

30

D0

O

ECL

31

D1

32

D2

9

D3

10

D4

11

D5

DGND2

Di

Digital GND for Internal Circuits.

Digital GND for Output Transistors.

Digital VEE. Connected internally with

AVEE. (Resistance is 4 to 6Ω.) Connect

to DGND through a ceramic chip

capacitor of 0.1µF or more just near the

pin.

LSB of Data Output. External pull-down

resistor is required.

Data Output. External pull-down resistors

are required.

MSB of Data Output. External pull-down

resistor is required.

DVEE

4-3

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