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ISL59482 查看數據表(PDF) - Renesas Electronics

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ISL59482 Datasheet PDF : 15 Pages
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ISL59482
Typical Performance Curves VS = ±5V, RL = 500Ω to GND, TA = +25°C, unless otherwise specified. (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
4 DIEPAD SOLDERED TO PCB PER JESD51-5
3 2.70W
2
QFN48
JA = +37°C/W
1
0
0
25
50
75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Pin Equivalent Circuits
V+
IN
LOGIC PIN
V-
CIRCUIT 1
21k
+
33k 1.2V-
CIRCUIT 2
V+
GND
V-
V+
OUT
V-
CIRCUIT 3
V1+
GNDA1
GNDB1
GNDC1
V1-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4A
V2+
GNDA2
GNDB2
GNDC2
V2-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4B
SUBSTRATE 1
V1-
~1M
SUBSTRATE 2
V2-
~1M
THERMAL HEAT SINK PAD
AC Test Circuits
VIN
50Ω
or
75Ω
ISL59482
CL
5pF
RL
500Ω
FIGURE 27A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD
VIN
50Ω
OR
75Ω
ISL59482
RS
CL 475Ω
5pF
50Ω
OR
75Ω
TEST
EQUIPMENT
50Ω
OR
75Ω
FIGURE 27B. TEST CIRCUIT FOR MEASURING WITH 50ΩOR 75Ω
INPUT TERMINATED EQUIPMENT
FN6209 Rev 4.00
Aug 8, 2014
Page 10 of 15

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