CXP5086 查看數據表（PDF） - Sony Semiconductor
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CXP5086 Datasheet PDF : 11 Pages
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CXP5084/5086
Electrical Characteristics
DC characteristics
(Ta = –20 to +75°C, VSS = 0V reference)
Item
High level
output voltage
Low level
output voltage
Symbol
Pin
VOH
PA to PF∗1,
PX0 to PX2,
PY0, PY1,
VL (VOL only)
RST (VOL only)
VOL
Condition
VDD = 4.5V, IOH = –0.5mA∗2
VDD = 4.5V, IOH = –1.0mA∗2
VDD = 4.5V, IOH = –10µA∗3
VDD = 4.5V, IOH = –200µA∗3
VDD = 4.5V, IOL = 1.8mA
VDD = 4.5V, IOL = 3.6mA
Min. Typ. Max. Unit
4.0
V
3.5
V
4.0
V
2.4
V
0.4 V
0.6 V
IIH
IILE
Input current
IILR
IIL
High impedance
I/O leakage current
IIZ
EXTAL∗4
RST∗5
PA to PF∗6,
PX0 to PX2∗6,
PX3∗8, PY0∗7,
PY1∗7, PY2∗8,
PY3∗8, INT1∗8,
WP∗8, RST∗5
VDD = 5.5V, VIH = 5.5V
VDD = 5.5V, VIL = 0.4V
VDD = 5.5V
VI = 0, 5.5V
0.5
–0.5
–1.5
40 µA
–40 µA
–400 µA
–2.0 mA
±10 µA
Common output
impedance
Segment output
impedance
RCOM
RSEG
COM0 to COM3
SEG0 to SEG15
SEG16 to SEG23∗1
VDD = 5V
VLC1 = 3.75V
VLC2 = 2.5V
VLC3 = 1.25V
3
5 kΩ
5
15 kΩ
Current power
supply
IDD
IDDSP
VDD
IDDS
VDD = 5.5V During external clock
1MHz operation
Entire output pins open
Sleep mode
Stop mode
1.3
(2)∗9
4
(6)∗9
mA
0.4 1.2
(0.5)∗9 (2)∗9
mA
10 µA
Input capacitance CIN
VLC1 to VLC3,
COM0 to COM3,
SEG0 to SEG15,
SEG16 to SEG23∗1,
Other pins than VDD,
VSS
Clock 1MHz
0V for no measured pins
10 20 pF
∗1 PE to PF show when the combined pins are selected as the port, and SEG16 to SEG23 show when the
combined pins are selected as the segment output.
∗2 It is when the respective pins of PA to PF and PX0 to PX2 select the 3-state output circuit, and PY0 and
PY1 are when the inverter output circuit is selected.
∗3 It is when the respective pins of PA to PF, PX0 to PX2, PY0 and PY1 select the pull-up resistance.
∗4 It is when the crystal or ceramic oscillation circuit is selected.
∗5 The RST pin specifies the input current when the pull-up resistance is selected, and specifies leakage
current when non-resistance is selected.
∗6 The respective pins of PA to PF and PX0 to PX2 specify the input current when the pull-up resistance is
selected, and specify the leakage current when in the port state during the 3-state output circuit or standby
is selected at high impedance.
∗7 The respective pins of PY0 and PY1 specify the input current when the pull-up resistance is selected, and
specify the leakage current when the port state during standby is selected at high impedance.
∗8 The respective pins of PX3, PY2, PY3, INT1 and WP only specify the leakage current.
∗9 The value in parentheses shows the specification of the current power supply of the high speed version.
–6–
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