datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

ICS9154A-10CN1N16 查看數據表(PDF) - Integrated Circuit Systems

零件编号
产品描述 (功能)
比赛名单
ICS9154A-10CN1N16
ICST
Integrated Circuit Systems ICST
ICS9154A-10CN1N16 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
AV9154A
Pin Configuration
16-Pin PDIP or SOIC
AV9154A-27
16-Pin PDIP or SOIC
AV9154A-42
Description of new pin:
SLOWCLK# forces 2XCPUCLK
output to ramp smoothly to
8MHz and CPUCLK output to 4
MHz when pulled low.
16-Pin PDIP or SOIC
AV9154A-43
Description of new pis:
SLOWCLK# forces 2XCPUCLK
output to ramp smoothly to
8MHz when pulled low.
STOPCLK# provides gilitch-
free stop of the 2XCPUCLK
output when pulled low. When
raised back high, the
2XCPUCLK output clock
resumes full speed operation
(no clock frequency ramp up
since the internal VCO is not
stopped).
16-Pin PDIP or SOIC
9154-04
16-Pin PDIP or SOIC
9154-10
16-Pin PDIP or SOIC
9154-26
2

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]