CD4017BMS 查看數據表（PDF） - Renesas Electronics
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CD4017BMS Datasheet PDF : 10 Pages
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CD4017BMS, CD4022BMS
Logic Diagram
CARRY
0
1
2
3
4
5
6
7
8
9
OUT
3
2
4
7
10
1
5
6
9
11
12
*RESET
15
D Q1
C Q1
R
D Q2
C Q2
R
D Q3
C Q3
R
D Q4
C Q4
R
*CLOCK
14
VDD
13
*CLOCK INHIBIT
VSS
* All Inputs Protected by CMOS Protection Network
FIGURE 1. CD4017BMS
D Q5
C Q5
R
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FN3297 Rev 0.00
August 1998
Page 6 of 10
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