MC33989(2002) 查看數據表（PDF） - Freescale Semiconductor

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MC33989
(Rev.:2002)

System Basis Chip with High Speed CAN Transceiver

Freescale Semiconductor 

MC33989

Freescale Semiconductor, Inc.

diagram to be inserted

Figure 5. Wake up block diagram

The block diagram illustrates how the wake up signal is generated. First the CAN signal is detected by a low consumption

receiver (WU receiver). Then the signal passes through a pulse width filter which discards the undesired pulses. The pulse must

have a width bigger than 0.5us and smaller than 500us to be acepted. When a pulse is discarded the pulse counter is reseted

and no wake signal is generated, otherwise when a pulse is acepted the pulse counter is incremented and after three pulses the

wake signal is asserted.

Each one of the pulses must be spaced by no more than 500us. In that case the pulse counter is reset and no wake signal is

generated. This is accomplished by the wake time-out generator. The wake up cycle is completed (and the wake flag reset)

when the CAN interface is brought to “CAN normal” mode.

The wake up capability of the CAN can be disabled, refer to SPI interface and register section, CAN register.

MC33989

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