UT62257CLSL-70LL 查看數據表（PDF） - Utron Technology Inc
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UT62257CLSL-70LL Datasheet PDF : 12 Pages
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Rev. 1.1
UTRON
CAPACITANCE (TA=25℃, f=1.0MHz)
UT62257C
32K X 8 BIT LOW POWER CMOS SRAM
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
CIN
-
8
pF
Input/Output Capacitance
CI/O
-
10
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
CL = 100pF, IOH/IOL = -1mA/4mA
AC ELECTRICAL CHARACTERISTICS (VCC = 5V±10% , TA = 0℃ to 70℃)
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
SYMBOL
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
UT62257C-35
MIN.
MAX.
35
-
-
35
-
35
-
25
10
-
5
-
-
25
-
25
5
-
UT62257C-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
35
-
35
5
-
(2) WRITE CYCLE
PARAMETER
SYMBOL
UT62257C-35
UT62257C-70
MIN.
MAX.
MIN.
MAX.
Write Cycle Time
tWC
35
Address Valid to End of Write
tAW
30
Chip Enable to End of Write
tCW
30
Address Set-up Time
tAS
0
Write Pulse Width
tWP
25
Write Recovery Time
tWR
0
Data to Write Time Overlap
tDW
20
Data Hold from End of Write Time
tDH
0
Output Active from End of Write
tOW*
5
Write to Output in High Z
tWHZ*
-
-
70
-
-
60
-
-
60
-
-
0
-
-
50
-
-
0
-
-
30
-
-
0
-
-
5
-
15
-
25
*These parameters are guaranteed by device characterization, but not production tested.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
P80062
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