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SC2677B 查看數據表(PDF) - Semtech Corporation

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SC2677B Datasheet PDF : 19 Pages
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SC2677B
POWER MANAGEMENT
Application Information
Main Loop(s)
The SC2677B is a dual, voltage mode synchronous Buck
controller. The two separate channels are identical and
share only IC supply pins (Vcc and GND), output driver
ground (PGND) and pre-driver supply voltage (BSTC). They
also share a common oscillator generating a sawtooth
waveform for channel 1 and an dephased sawtooth for
channel 2. Channel 2 has both inputs of the error ampli-
fier uncommitted and available externally. This allows the
SC2677B to operate in two distinct modes.
a) Two independent channels with either common
or different input voltages and different output
voltages. The two channels each have their own volt-
age feedback path from their own output. In this
mode, positive input of the error amplifier 2 is con-
nected externally to Vref. If the application uses a
common input voltage, the sawtooth phase shift be-
tween the channels provides some measure of input
ripple current cancellation.
b) Two channels operating in current sharing mode
with common output voltage and either common in-
put voltage or different input voltages. In this mode,
channel 1 operates as a voltage mode Buck controller,
as before, but error amplifier 2 monitors and ampli-
fies the difference in voltage across the output cur-
rent sense resistors of channel 1 and channel 2 (Mas-
ter and Slave) and adjusts the Slave duty cycle to
match output currents. To controller also works well
for using the output choke winding resistance as cur-
rent sensing element (please refer the application
schematic for details). The amount of the current of
the slave channel vs the master channel can be pro-
grammed according to the application. This feature
is especially useful when two input sources are used
and each source has its power budget.
The controller provides a power good signal. This is an
open collector output, which is pulled low if the output
voltage is outside of the power good window.
Soft Start/Enable
The Soft Start/Enable (SS/ENA) pin serves several
functions. If held below the Enable threshold, both chan-
nels are inhibited. DH1 and DH2 will be low, turning off
the top FETs. Between the Soft Start Enable threshold
and the Soft Start End threshold, the duty cycle is allowed
to increase. At the Soft Start End threshold, maximum
duty cycle is reached. In practical applications the error
amplifier will be controlling the duty cycle before the Soft
Start End threshold is reached. To avoid boost problems
during start-up in current share mode, both channels start
up in asynchronous mode, and the bottom FET body diode
is used for circulating current during the top FET off time.
When the SS/ENA pin reaches the Soft Start Transition
threshold, the channels begin operating in synchronous
mode for improved efficiency. The soft start pin sources
approximately 50uA and soft start timing can be set by
selection of an appropriate soft start capacitor value.
Frequency Set and Phasing
The switching frequency can be programmed by connect-
ing a resistor from the FREQ pin to AGND. The PHASING
pin controls the phase shift between the master sawtooth
and slave sawtooth which allows the adjustment of the
phase shift for maximum noise immunity by controlling
the timing between master and slave transition. A resis-
tive divider is used from the FREQ pin to AGND and the
divided voltage is fed to the PHASING pin as depicted.
The offset of the current sharing error amplifier is
R13
trimmed whthin the range of -2mV to 0mV. The po-
larity being such that the slave is OFF if the master
has no current.
R19
SC2677B
Power Good
© 2009 Semtech Corp.
7
www.semtech.com

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