CMX635L4 查看數據表（PDF） - MX-COM Inc

零件编号

产品描述 (功能)

比赛名单

CMX635L4

ISDN Subscriber Processor

MX-COM Inc  

ISDN subscriber Processor

Page 10 of 88

CMX635 Advance Information

nRD

Pin Name

nCS

nIRQ

RESET

X1, X2

CLOCKOUT

VBias

RX1O, RX1P, RX1N,

RX2O, RX2P, RX2N

TX1O, TX1ON,

TX1N, TXOP

TX2O, TX2ON

SPM

STISet

VSSd, VDDd, VSSa, VDDa

Description

Read Strobe, active low. Initiates a CMX635 read cycle and enables read data

to be driven onto the AD bus in Intel style mode. Acts as a DS or E strobe in

Motorola style mode. See the timing diagrams in section 7.1 for more details

on the nWR pin function.

Chip Select, active low. Must be low for duration of read or write cycle in all

interface modes. Processor interface is inactive and will not respond to

read/write strobe activity when nCS is high.

Interrupt Request, open drain. Pulled to Vss when the CMX635 internal Status

Registers generate an unmasked interrupt request. It remains in its high

impedance state when no interrupts are pending. An external pull-up resistor

is required.

Global Chip Reset. Active high reset input resets CMX635 internal state and

restores default configuration. The RESET input should be asserted at power-

up before any configuration is written or modes activated. The RESET must

be asserted until the oscillator input has stabilized (either from a crystal or

external clock source) to ensure full internal reset.

Oscillator input pins. A 12.288Mhz or 15.36MHz crystal may be connected

between these pins (see External Components section 3) or an external clock

source may be connected to X1 with X2 connected to Vss.

Buffered Clock. A buffered version of the input clock on X1 is available on

CLOCKOUT and may be used for driving the clock inputs of other devices.

Optionally the internal phase locked 1.536MHz clock may be routed to

CLOCKOUT, which can be utilized by external circuitry to lock together

multiple CMX635 devices if required.

The internal analog reference voltage. An external capacitor must be

connected between Vbias and analog ground to ensure noise free operation.

Output, positive and negative inputs of the differential microphone input

amplifiers. See section 3.2 for details of the equivalent analog input circuits.

Differential Outputs, negative input and internal preamplifier output of the

earpiece/POTS output amplifier. See section 3.2 for details of the equivalent

analog output circuits. The required external gain components are inserted

between the TX1ON and TX1N pins, which form the input impedance to the

inverting earpiece amplifier.

Loudspeaker/Ring amplifier differential outputs.

Subscriber Pulse Metering sine wave output for emulating POTS style call

cost information.

ST transmitter current set pin. A fixed resistor must be connected between this

pin and analog Vss to ensure accurate current limit on the ST transmitter.

Analog and Digital supply pins. Ensure adequate high and low frequency

decoupling between positive and negative supplies. It is recommended that

the analog and digital supplies are locally separated.

2001 MX-COM, Inc.

www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054

Doc. # 20480225.002

4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.

Share Link: