APW7062BKC-TRG 查看數據表（PDF） - Anpec Electronics

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APW7062BKC-TRG

Synchronous Buck PWM Controller

Anpec Electronics 

APW7062B

Block Diagram

VCC

OCSET

GND

EN

Power-On

Reset

VCC

ISS

10µA

SS

Soft Start

5.8V

:2

50%VREF

VREF

Error

Amp

IOCSET

200µA

O.C.P

Comparator

U.V.P

Comparator

PWM

Comparator

Gate

Control

Oscillator

Triangle

Wave

BOOT

UGATE

PHASE

PVCC

LGATE

PGND

FB

COMP RT

Typical Application Circuit

12V

R2

10K

R4

NC

SHDN

C7

0.1uF

C13

47pF

R10

15K

C12

8200pF

R1

10R

D1

1N4148

U1

A PW7062B

1

2

3

4

RT

OCSET

SS

V CC

PV CC

LGA TE

14

13

12

11

5

6

7

COMP

FB

EN

GND

PGND

BOOT

UGA TE

PHASE

10

9

8

C1

1uF

R3

1K

C2 1nF

R5 4

2R2

C8

0.1uF

R6 4

0R

+ C3

8

C5

470uF

7

4.7uF 16V

6

30mR

5

Q1

A PM4220

1

2

3

L2

8

7

6

5

Q2

A PM4220

1

2

3

2.2uH

D2

SR24

2A/40V

L1

1uH

+ C6

470uF

16V

30mR

12V

+ C4

100uF

16V

1.2V

R7

NC

R8

1KF

C12 1%

NC

+ C9

1000uF

6.3V

30mR

+ C10

1000uF

6.3V

30mR

C11

4.7uF

VOUT

=

VREF

× 1+

R8

R9



Copyright © ANPEC Electronics Corp.

8

Rev. A.4 - Oct., 2008

R9

2KF

1%

www.anpec.com.tw

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